{ "metadata": { "conference": "MICRO 2026", "edition": 59, "city": "Athens, Greece", "conference_dates": "2026-10-31 / 2026-11-04", "paper_dates": "2026-11-02 / 2026-11-04", "source_name": "MICRO 2026 official main program", "source_url": "https://www.microarch.org/micro59/program/", "source_file": "assets/data/micro-2026-source.html", "source_sha256": "f941b51bc35eb786cf4e5d407c8da138189e45a95e00d86c7bab7385b1c39634", "fetched_at": "2026-10-29T10:11:39Z", "total_papers": 220, "main_papers": 213, "industry_papers": 7, "session_count": 34, "source_paper_block_count": 223, "excluded_empty_slot_count": 0, "excluded_nonpaper_count": 3, "main_session_count": 33, "industry_session_count": 1, "category_method": "Exclusive grouping of official sessions; not per-paper topic classification.", "scope": "All named papers in the published main program, including Industry Session; opening remarks, keynotes, PhD Jobs and SRC sessions, panels and social activities excluded.", "scope_explanation": "会前已公布议程，含 Research Track 与首届 Industry Track；排除开幕致辞、主题报告、招聘、SRC 和社交活动。", "available_fields": [ "title", "authors_with_affiliations", "session", "track", "date", "location", "chair" ], "limitations": [ "会议尚未举行；这里总结已公布的论文议程与公开版本，不是会后报告。", "方向按官方场次互斥归组；杰出论文场次单列，不表示完整主题占比。", "官网不提供论文摘要和原文；公开版本的技术解读单独标注来源。", "标题仅规范化空白，保留官网 LaTeX 和可能的拼写问题。" ] }, "categories": [ { "id": "gpu", "label": "GPU 微架构与数值计算", "description": "GPU 微架构、数值精度及 GPU 存储与流水线场次。", "paper_count": 14 }, { "id": "pim-llm", "label": "PIM / 3D 堆叠与 LLM", "description": "面向 LLM 的近存计算、3D 堆叠及长上下文推理场次。", "paper_count": 19 }, { "id": "industry", "label": "工业界实践", "description": "官方 Industry Session，保留独立 track。", "paper_count": 7 }, { "id": "low-bit", "label": "低比特与稀疏推理", "description": "LUT、量化及稀疏推理场次；具体主题以逐篇标题为准。", "paper_count": 14 }, { "id": "interconnect", "label": "ML 系统互连与异构调度", "description": "官方 ML System Interconect 场次。", "paper_count": 7 }, { "id": "memory", "label": "内存、缓存与地址翻译", "description": "内存功耗、刷新、预取、缓存并行及 DRAM 可靠性场次。", "paper_count": 21 }, { "id": "distinguished", "label": "杰出论文场次", "description": "官方 Distinguished Papers I / II，包含多个研究主题。", "paper_count": 12 }, { "id": "domain", "label": "机器人、视觉与专用加速", "description": "机器人、图、视觉语言模型及数据流推理场次。", "paper_count": 21 }, { "id": "cpu", "label": "CPU 微架构与编译", "description": "分支预测、指令预取、微架构及编译场次。", "paper_count": 14 }, { "id": "modeling", "label": "仿真、性能与功耗建模", "description": "仿真、性能预测及设计空间探索场次。", "paper_count": 14 }, { "id": "quantum", "label": "量子与新兴计算", "description": "官方 Quantum 及 Quantum & Emerging Technologies 场次。", "paper_count": 14 }, { "id": "pim-search", "label": "近数据计算与存内检索", "description": "NDP / PIM 设计探索及近存、存内搜索场次。", "paper_count": 11 }, { "id": "security", "label": "安全、共享内存与密码计算", "description": "侧信道、机密计算、安全内存共享及密码加速场次。", "paper_count": 11 }, { "id": "spatial", "label": "空间架构、FPGA 与 CGRA", "description": "空间映射、高层次综合、FPGA / CGRA 场次。", "paper_count": 11 }, { "id": "reliability", "label": "可靠性与能量受限系统", "description": "新兴技术、可靠性、容错及能量受限系统场次。", "paper_count": 12 }, { "id": "cxl", "label": "CXL 分层内存与存储", "description": "CXL、缓存带宽和分层内存存储场次。", "paper_count": 12 }, { "id": "datacenter", "label": "并行架构与数据中心", "description": "官方 Parallel Architectures / Datacenter Systems 场次。", "paper_count": 6 } ], "sessions": [ { "id": "1a", "title": "Session 1A: GPU Microarchitecture & Numerical Precision", "theme": "GPU Microarchitecture & Numerical Precision", "date": "2026-11-02", "location": "Ballroom I", "chair": "Blaise Tine (Univ. of California, Los Angeles)", "category": "gpu", "track": "main", "paper_count": 7, "source_url": "https://www.microarch.org/micro59/program/#ii-a" }, { "id": "1b", "title": "Session 1B: 3D-Stacked & PIM Architectures for LLM/MoE Serving", "theme": "3D-Stacked & PIM Architectures for LLM/MoE Serving", "date": "2026-11-02", "location": "Ballroom II", "chair": "Mircea Stan (Univ. of Virginia)", "category": "pim-llm", "track": "main", "paper_count": 7, "source_url": "https://www.microarch.org/micro59/program/#ii-b" }, { "id": "1c", "title": "Session 1C: Industry Session", "theme": "Industry Session", "date": "2026-11-02", "location": "Ballroom III", "chair": "Gilles Pokam (AMD)", "category": "industry", "track": "industry", "paper_count": 7, "source_url": "https://www.microarch.org/micro59/program/#ii-c" }, { "id": "1d", "title": "Session 1D: Low-Bit LUT-Based & Sparse Inference", "theme": "Low-Bit LUT-Based & Sparse Inference", "date": "2026-11-02", "location": "Ypsilon", "chair": "Bahar Asgari (Univ. of Maryland)", "category": "low-bit", "track": "main", "paper_count": 7, "source_url": "https://www.microarch.org/micro59/program/#ii-d" }, { "id": "2a", "title": "Session 2A: ML System Interconect", "theme": "ML System Interconect", "date": "2026-11-02", "location": "Ballroom I", "chair": "Tom St. John (Gimlet Labs)", "category": "interconnect", "track": "main", "paper_count": 7, "source_url": "https://www.microarch.org/micro59/program/#iii-a" }, { "id": "2b", "title": "Session 2B: Memory System Power, Refresh & Predictive Prefetching", "theme": "Memory System Power, Refresh & Predictive Prefetching", "date": "2026-11-02", "location": "Ballroom II", "chair": "Giray Yaglikci (CISPA)", "category": "memory", "track": "main", "paper_count": 7, "source_url": "https://www.microarch.org/micro59/program/#iii-b" }, { "id": "2c", "title": "Session 2C: Distinguished Papers I -- Memory Systems & Microarchitecture", "theme": "Distinguished Papers I -- Memory Systems & Microarchitecture", "date": "2026-11-02", "location": "Ballroom III", "chair": "Rahul Bera (Huawei Research)", "category": "distinguished", "track": "main", "paper_count": 6, "source_url": "https://www.microarch.org/micro59/program/#iii-c" }, { "id": "2d", "title": "Session 2D: Accelerators for Robotics, Vision & Graph Workloads", "theme": "Accelerators for Robotics, Vision & Graph Workloads", "date": "2026-11-02", "location": "Ypsilon", "chair": "Tianyu Jia (Peking Univ.)", "category": "domain", "track": "main", "paper_count": 7, "source_url": "https://www.microarch.org/micro59/program/#iii-d" }, { "id": "3a", "title": "Session 3A: Branch Prediction & Instruction-Level Prefetching", "theme": "Branch Prediction & Instruction-Level Prefetching", "date": "2026-11-02", "location": "Ballroom I", "chair": "Polychronis Xekalakis (NVIDIA)", "category": "cpu", "track": "main", "paper_count": 7, "source_url": "https://www.microarch.org/micro59/program/#iv-a" }, { "id": "3b", "title": "Session 3B: Design Methodology: Simulation & Performance Modeling", "theme": "Design Methodology: Simulation & Performance Modeling", "date": "2026-11-02", "location": "Ballroom II", "chair": "Biswabandan Panda (IIT Bombay)", "category": "modeling", "track": "main", "paper_count": 7, "source_url": "https://www.microarch.org/micro59/program/#iv-b" }, { "id": "3c", "title": "Session 3C: Distinguished Papers II -- Security, Verification & Efficient ML Systems", "theme": "Distinguished Papers II -- Security, Verification & Efficient ML Systems", "date": "2026-11-02", "location": "Ballroom III", "chair": "Yiming Gan (Inst. of Computing Tech., Chinese Academy of Sciences)", "category": "distinguished", "track": "main", "paper_count": 6, "source_url": "https://www.microarch.org/micro59/program/#iv-c" }, { "id": "3d", "title": "Session 3D: Quantum", "theme": "Quantum", "date": "2026-11-02", "location": "Ypsilon", "chair": "Swamit Tannu (Wisconsin)", "category": "quantum", "track": "main", "paper_count": 7, "source_url": "https://www.microarch.org/micro59/program/#iv-d" }, { "id": "4a", "title": "Session 4A: NDP and PIM Design Exploration", "theme": "NDP and PIM Design Exploration", "date": "2026-11-03", "location": "Ballroom I", "chair": "Mohammad Alian (Cornell Univ.)", "category": "pim-search", "track": "main", "paper_count": 5, "source_url": "https://www.microarch.org/micro59/program/#v-a" }, { "id": "4b", "title": "Session 4B: Side-Channel Attacks & Confidential Computing", "theme": "Side-Channel Attacks & Confidential Computing", "date": "2026-11-03", "location": "Ballroom II", "chair": "Sarbartha Banerjee (Georgia Inst. of Technology)", "category": "security", "track": "main", "paper_count": 5, "source_url": "https://www.microarch.org/micro59/program/#v-b" }, { "id": "4c", "title": "Session 4C: Thermal-Aware 3D-Stacked LLM Accelerators", "theme": "Thermal-Aware 3D-Stacked LLM Accelerators", "date": "2026-11-03", "location": "Ballroom III", "chair": "Robert M Radway (Univ. of Pennsylvania)", "category": "pim-llm", "track": "main", "paper_count": 5, "source_url": "https://www.microarch.org/micro59/program/#v-c" }, { "id": "5a", "title": "Session 5A: Accelerator Spatial Mapping & High-Level Synthesis", "theme": "Accelerator Spatial Mapping & High-Level Synthesis", "date": "2026-11-03", "location": "Ballroom I", "chair": "Sagar Karandikar (Univ. of California, Berkeley)", "category": "spatial", "track": "main", "paper_count": 5, "source_url": "https://www.microarch.org/micro59/program/#vi-a" }, { "id": "5b", "title": "Session 5B: Emerging Technologies and Reliability", "theme": "Emerging Technologies and Reliability", "date": "2026-11-03", "location": "Ballroom II", "chair": "Jiayi Huang (HKUST(GZ))", "category": "reliability", "track": "main", "paper_count": 5, "source_url": "https://www.microarch.org/micro59/program/#vi-b" }, { "id": "5c", "title": "Session 5C: CXL, Caching & GPU Bandwidth Management", "theme": "CXL, Caching & GPU Bandwidth Management", "date": "2026-11-03", "location": "Ballroom III", "chair": "Chang Hyun Park (Uppsala Univ.)", "category": "cxl", "track": "main", "paper_count": 5, "source_url": "https://www.microarch.org/micro59/program/#vi-c" }, { "id": "6a", "title": "Session 6A: Microarchitecture & Compilers", "theme": "Microarchitecture & Compilers", "date": "2026-11-03", "location": "Ballroom I", "chair": "Alberto Ros (Univ. of Murcia)", "category": "cpu", "track": "main", "paper_count": 7, "source_url": "https://www.microarch.org/micro59/program/#vii-a" }, { "id": "6b", "title": "Session 6B: Energy-Constrained & Fault-Tolerant Systems", "theme": "Energy-Constrained & Fault-Tolerant Systems", "date": "2026-11-03", "location": "Ballroom II", "chair": "Lev Mukhanov (IMEC/Queen Mary Univ. of London)", "category": "reliability", "track": "main", "paper_count": 7, "source_url": "https://www.microarch.org/micro59/program/#vii-b" }, { "id": "6c", "title": "Session 6C: Low-Bit Quantization for LLM Inference", "theme": "Low-Bit Quantization for LLM Inference", "date": "2026-11-03", "location": "Ballroom III", "chair": "Michael Jaemin Kim (Meta)", "category": "low-bit", "track": "main", "paper_count": 7, "source_url": "https://www.microarch.org/micro59/program/#vii-c" }, { "id": "6d", "title": "Session 6D: CXL-Based Tiered Memory & Storage", "theme": "CXL-Based Tiered Memory & Storage", "date": "2026-11-03", "location": "Ypsilon", "chair": "Zhengrong Wang (CUHK)", "category": "cxl", "track": "main", "paper_count": 7, "source_url": "https://www.microarch.org/micro59/program/#vii-d" }, { "id": "7a", "title": "Session 7A: Memory & Pipeline Efficiency Techniques for GPU", "theme": "Memory & Pipeline Efficiency Techniques for GPU", "date": "2026-11-04", "location": "Ballroom I", "chair": "Hajar Falahati (Barcelona Supercomputing Center (BSC))", "category": "gpu", "track": "main", "paper_count": 7, "source_url": "https://www.microarch.org/micro59/program/#viii-a" }, { "id": "7b", "title": "Session 7B: Performance & Power Modeling for DSE", "theme": "Performance & Power Modeling for DSE", "date": "2026-11-04", "location": "Ballroom II", "chair": "Lieven Eeckhout (Ghent Univ.)", "category": "modeling", "track": "main", "paper_count": 7, "source_url": "https://www.microarch.org/micro59/program/#viii-b" }, { "id": "7c", "title": "Session 7C: Vision-Language & Multimodal Model Acceleration", "theme": "Vision-Language & Multimodal Model Acceleration", "date": "2026-11-04", "location": "Ballroom III", "chair": "Yu Feng (SJTU)", "category": "domain", "track": "main", "paper_count": 7, "source_url": "https://www.microarch.org/micro59/program/#viii-c" }, { "id": "7d", "title": "Session 7D: Cache & Memory-Level Parallelism", "theme": "Cache & Memory-Level Parallelism", "date": "2026-11-04", "location": "Ypsilon", "chair": "Arthur Perais (CNRS)", "category": "memory", "track": "main", "paper_count": 7, "source_url": "https://www.microarch.org/micro59/program/#viii-d" }, { "id": "8a", "title": "Session 8A: PIM & Near-Memory Long-Context LLM Serving", "theme": "PIM & Near-Memory Long-Context LLM Serving", "date": "2026-11-04", "location": "Ballroom I", "chair": "Sukhan Lee (Samsung)", "category": "pim-llm", "track": "main", "paper_count": 7, "source_url": "https://www.microarch.org/micro59/program/#ix-a" }, { "id": "8b", "title": "Session 8B: DRAM Reliability, ECC & Address Translation", "theme": "DRAM Reliability, ECC & Address Translation", "date": "2026-11-04", "location": "Ballroom II", "chair": "Jovan Stojkovic (Univ. of Texas at Austin)", "category": "memory", "track": "main", "paper_count": 7, "source_url": "https://www.microarch.org/micro59/program/#ix-b" }, { "id": "8c", "title": "Session 8C: Systolic & Dataflow Innovations for LLM/GNN Inference", "theme": "Systolic & Dataflow Innovations for LLM/GNN Inference", "date": "2026-11-04", "location": "Ballroom III", "chair": "Zhengrong Wang (CUHK)", "category": "domain", "track": "main", "paper_count": 7, "source_url": "https://www.microarch.org/micro59/program/#ix-c" }, { "id": "8d", "title": "Session 8D: Quantum & Emerging Technologies", "theme": "Quantum & Emerging Technologies", "date": "2026-11-04", "location": "Ypsilon", "chair": "Nathaniel Bleier (Univ. of Michigan)", "category": "quantum", "track": "main", "paper_count": 7, "source_url": "https://www.microarch.org/micro59/program/#ix-d" }, { "id": "9a", "title": "Session 9A: FPGA / CGRA Accelerators", "theme": "FPGA / CGRA Accelerators", "date": "2026-11-04", "location": "Ballroom I", "chair": "Xinyu Chen (HKUST(GZ))", "category": "spatial", "track": "main", "paper_count": 6, "source_url": "https://www.microarch.org/micro59/program/#x-a" }, { "id": "9b", "title": "Session 9B: Near-Memory & In-Storage Search Acceleration", "theme": "Near-Memory & In-Storage Search Acceleration", "date": "2026-11-04", "location": "Ballroom II", "chair": "Nika Mansouri Ghiasi (ETH Zürich)", "category": "pim-search", "track": "main", "paper_count": 6, "source_url": "https://www.microarch.org/micro59/program/#x-b" }, { "id": "9c", "title": "Session 9C: Parallel Architectures / Datacenter Systems", "theme": "Parallel Architectures / Datacenter Systems", "date": "2026-11-04", "location": "Ballroom III", "chair": "Alexandros Daglis (Univ. of Edinburgh & Georgia Tech)", "category": "datacenter", "track": "main", "paper_count": 6, "source_url": "https://www.microarch.org/micro59/program/#x-c" }, { "id": "9d", "title": "Session 9D: Secure Memory Sharing & Cryptographic Acceleration", "theme": "Secure Memory Sharing & Cryptographic Acceleration", "date": "2026-11-04", "location": "Ypsilon", "chair": "Jongse Park (KAIST)", "category": "security", "track": "main", "paper_count": 6, "source_url": "https://www.microarch.org/micro59/program/#x-d" } ], "papers": [ { "id": "micro26-573fb754e3da", "title": "Ray-by-Ray: Fine-Grained Resource Management for GPU Ray Tracing Units", "authors": "Junrui Pan, Cesar Avalos Baddouh, Kai Ze Ee, Timothy G Rogers (Purdue Univ.)", "session_id": "1a", "session": "Session 1A: GPU Microarchitecture & Numerical Precision", "category": "gpu", "track": "main", "date": "2026-11-02", "time": null, "source_url": "https://www.microarch.org/micro59/program/#ii-a", "paper_url": null, "abstract": null }, { "id": "micro26-0c3cc95a871a", "title": "Bit-Accurate Modeling of GPU Matrix Multiply-Accumulate Units: Demystifying Numerical Discrepancy and Accuracy", "authors": "Peichen Xie, Shuotao Xu, Yang Wang, Fan Yang, Mao Yang (Microsoft Research)", "session_id": "1a", "session": "Session 1A: GPU Microarchitecture & Numerical Precision", "category": "gpu", "track": "main", "date": "2026-11-02", "time": null, "source_url": "https://www.microarch.org/micro59/program/#ii-a", "paper_url": null, "abstract": null }, { "id": "micro26-835e15696515", "title": "Not All Dot Products Are Equal: The Hidden MMA Arithmetic Design Space Drives Cross-Architecture LLM Inference Gaps", "authors": "Jongyeop Kim (SungKyunKwan Univ.); Chaeyeon Kim (Sookmyung Women's Univ.); Jeongwoo Park (SungKyunKwan Univ.)", "session_id": "1a", "session": "Session 1A: GPU Microarchitecture & Numerical Precision", "category": "gpu", "track": "main", "date": "2026-11-02", "time": null, "source_url": "https://www.microarch.org/micro59/program/#ii-a", "paper_url": null, "abstract": null }, { "id": "micro26-d05e9ef7765c", "title": "Better Call SoL : Enhancing GPUs with a Sea of LUTs Core", "authors": "Shashank Nag, Justin Garrigus, Yuting Chen, Lizy K John (The Univ. of Texas at Austin)", "session_id": "1a", "session": "Session 1A: GPU Microarchitecture & Numerical Precision", "category": "gpu", "track": "main", "date": "2026-11-02", "time": null, "source_url": "https://www.microarch.org/micro59/program/#ii-a", "paper_url": null, "abstract": null }, { "id": "micro26-611340c02370", "title": "Complex Tensor Core: Software-Hardware Co-Design for Accelerating Complex-Valued Neural Networks on GPUs", "authors": "Eunbi Jeong, Jennifer N. Choi, Ji yeong Yi, Jane Rhee (Ewha Womans Univ.); Gunjae Koo, Yunho Oh (Korea Univ.); Myung Kuk Yoon (Ewha Womans Univ.)", "session_id": "1a", "session": "Session 1A: GPU Microarchitecture & Numerical Precision", "category": "gpu", "track": "main", "date": "2026-11-02", "time": null, "source_url": "https://www.microarch.org/micro59/program/#ii-a", "paper_url": null, "abstract": null }, { "id": "micro26-f4ba13b4250b", "title": "RESCU: Optimizing GPU Register Management for Effective Kernel Fusion", "authors": "Ruixiao Huang, Shouzhe Zhang, Weishi Shi, Hui Zhao (Univ. of North Texas)", "session_id": "1a", "session": "Session 1A: GPU Microarchitecture & Numerical Precision", "category": "gpu", "track": "main", "date": "2026-11-02", "time": null, "source_url": "https://www.microarch.org/micro59/program/#ii-a", "paper_url": null, "abstract": null }, { "id": "micro26-74179d883036", "title": "SnakeCharmer: Orchestrating Utility, Timeliness, and Placement in GPU Prefetching", "authors": "Yuhan Tang, Tiejun Li, Jianmin Zhang, An Hu (National Univ. of Defense Technology); Guangyu Sun (Peking Univ.); Sheng Ma, Yiqun Lang, Hanqing Li, Siqing Fu (National Univ. of Defense Technology)", "session_id": "1a", "session": "Session 1A: GPU Microarchitecture & Numerical Precision", "category": "gpu", "track": "main", "date": "2026-11-02", "time": null, "source_url": "https://www.microarch.org/micro59/program/#ii-a", "paper_url": null, "abstract": null }, { "id": "micro26-8e3b17e152d7", "title": "ATLAS: Pathfinding Efficient 3D-DRAM-based LLM Inference Accelerator Design via Silicon-Proven Full-Stack Simulation", "authors": "Cong Li, Chenhao Xue, Yi Ren, Xiping Dong, Yu Cheng, Yinbo Hu (Peking Univ.); Fujun Bai, Yixin Guo, Xiping Jiang (Xi'an UniIC Semiconductors); Qiang Wu (Houmo AI); Zhi Yang, Zhe Cheng (Peking Univ.); Yuan Xie (Hong Kong Univ. of Science and Technology); Guangyu Sun (Peking Univ.)", "session_id": "1b", "session": "Session 1B: 3D-Stacked & PIM Architectures for LLM/MoE Serving", "category": "pim-llm", "track": "main", "date": "2026-11-02", "time": null, "source_url": "https://www.microarch.org/micro59/program/#ii-b", "paper_url": null, "abstract": null }, { "id": "micro26-b88e7a010614", "title": "HiLLM: Heterogeneous CPU–GPU Inference for Interactive MoE LLM Serving on Local Systems", "authors": "Insu Choi, Seungchan Lee, Joon-Sung Yang (Yonsei Univ.)", "session_id": "1b", "session": "Session 1B: 3D-Stacked & PIM Architectures for LLM/MoE Serving", "category": "pim-llm", "track": "main", "date": "2026-11-02", "time": null, "source_url": "https://www.microarch.org/micro59/program/#ii-b", "paper_url": null, "abstract": null }, { "id": "micro26-41c443883df4", "title": "DART: A Cache-Enabled Diffusion Transformer Accelerator via Feature-Gated Scheduling and Hierarchical Quantization", "authors": "Zihan Zou, Peng Zheng, Shun Zhang, Xinyang Chen, Jiaming Lin, Bori An, Yichen Hu, Xinming Yan, Xin Cao, Hao Cai, Bo Liu (Southeast Univ.)", "session_id": "1b", "session": "Session 1B: 3D-Stacked & PIM Architectures for LLM/MoE Serving", "category": "pim-llm", "track": "main", "date": "2026-11-02", "time": null, "source_url": "https://www.microarch.org/micro59/program/#ii-b", "paper_url": null, "abstract": null }, { "id": "micro26-fac9e82473ba", "title": "HyPIM: A Unified PIM Architecture for Accelerating Mamba-Transformer Hybrid Model Inference", "authors": "Hyemin Park, Isaac Jeong, Junghwan Lim, Jungi Hyun, Hyuk-Jae Lee (Seoul National Univ.)", "session_id": "1b", "session": "Session 1B: 3D-Stacked & PIM Architectures for LLM/MoE Serving", "category": "pim-llm", "track": "main", "date": "2026-11-02", "time": null, "source_url": "https://www.microarch.org/micro59/program/#ii-b", "paper_url": null, "abstract": null }, { "id": "micro26-3cb269edef36", "title": "NFC: A 3D NAND Flash-CIM Centric Architecture for Efficient On-Device MoE LLM Inference", "authors": "Siyuan Chen, Ao Shi, Shiyang Li, Jiaqi Li, Haozhang Yang, Haobin Shang, Lianliang Wu, Ruiqi Chen, Yiyang Chen (School of Integrated Circuits, Peking Univ.); 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